The present invention relates to a thin film transistor having a shading layer which is easy to form and to a thin film transistor which is stable against external incident light.
Recently, the thin film transistor formed on the surface of an insulating substrate, such as glass, has been widely researched. A plurality of switching elements each made up of such a thin film transistor have been formed on insulating substrates in a matrix configuration to constitute a matrix liquid crystal display device, matrix electroluminescence display device or matrix electrochromic display device. These matrix display devices can be used for displaying a television image.
A semiconductor layer used for the thin film transistor consists of hydrogenated amorphous silicon. The hydrogenated amorphous silicon is considered to be a promising material. The hydrogenated amorphous silicon layer is formed by plasma chemical vapor deposition (hereinafter refered to as plasma CVD) on the surface of the substrate, such as a glass plate, at low cost. Since the hydrogenated amorphous silicon has a large photoconductivity (as is evident from its application for a solar cell,) the hydrogenated amorphous silicon must be used with shading in its application for a display device.
The sectional view of the thin film transistor with the conventional shading structure is shown in FIG. 1. As shown in FIG. 1, the thin film transistor consists of a glass substrate 1, a gate electrode 2 made of metal such as aluminum or chromium, a gate insulating layer 3 made of silicon dioxide, silicon nitride and so on, a hydrogenated amorphous silicon layer 4, source and drain electrodes 5, 6 each made of metal such as aluminum or chromium, insulating layers 7 and 8 each made of silicon dioxide, silicon nitride and so on and a shading layer 9 made of metal such as aluminum or chromium.
The thin film transistor shown in FIG. 1 operates as an insulated gate electric field effect type transistor by applying a voltage to the gate electrode 2. The application of the voltage causes a channel to be formed between the source electrode 5 and the drain electrode 6 and in the surface portion of the amorphous silicon layer 4 adjacent to the gate insulating layer 3.
Since the channel portion of the thin film transistor shown in FIG. 1 is covered by the shading layer 9 against incident light from the top direction and is also covered by the gate electrode 2 against incident light from the bottom direction, photo current is not induced in the channel between the source electrode 5 and the drain electrode 6. Therefore the thin film transistor normally operates under incident light conditions without a package. The thin film transistor shown in FIG. 1, however, has the following drawbacks.
1. Two additional photo etching processes are required for forming the insulating layer 8 and the shading layer 9 as compared to the ordinary process of fabrication of the thin film transistor.
2. The capacitive coupling between the amorphous silicon layer 4 and the shading layer 9 reduces the operating speed of the transistor.
3. The short circuit defect between the shading layer 9 and the source electrode 5 or drain electrode 6 reduces the yield rate of the transistor.